1. Field of the Invention
This invention relates generally to the execution of decimal arithmetic instructions by a commercial instruction processor and more particularly to apparatus which selects portions of a register into which decimal digits, bytes or double words are written.
2. Description of the Prior Art
A data processing system which executes decimal arithmetic instructions includes a main memory for storing string decimal arithmetic instructions and operands. The operands are stored in main memory in double words as string decimal operands or packed decimal operands. String decimal operands are made up of 4 bytes per double word and packed decimal operands are made up of 8 decimal digits per double word. There are 4 bits in each decimal digit.
The operands are processed in a serial fashion by an arithmetic logic unit. A register coupled to the arithmetic logic unit receives double words from main memory and either decimal digits or bytes in selected portions of the register as a result of the execution of the decimal arithmetic instruction.
U.S. Pat. No. 4,272,828, issued June 6, 1981, entitled "Arithmetic Logic Apparatus for a Data Processing System", describes firmware controlled apparatus for writing decimal digits, bytes or words into a register. This system required a number of different firmware routines for the write operation which increased the number of control store words required and limited the system throughput.
It should be understood that the references cited herein are those of which the applicants are aware and are presented to acquaint the reader with the level of skill in the art and may not be the closest reference to the invention. No representation is made that any search has been conducted by the applicants.